How are photovoltaic cells manufactured in a factory?

Photovoltaic cells, the heart of solar panels, are manufactured through a highly precise, multi-stage industrial process that transforms raw polysilicon into functional electricity-generating units. The journey from sand to cell involves sophisticated chemistry, high-temperature furnaces, and nanoscale engineering to create the semiconductor structure that enables the photovoltaic effect. A typical factory is a symphony of automated production lines, clean rooms, and rigorous quality control, all working in concert to produce cells with ever-increasing efficiency and reliability. The entire process, from silicon purification to cell testing, is designed for scalability and cost-effectiveness to meet global demand for clean energy.

The foundational material for over 95% of all solar cells is silicon, specifically highly purified polysilicon. This material starts as quartzite, a type of sand, which is refined in an arc furnace to create metallurgical-grade silicon (MG-Si) that is about 99% pure. However, solar-grade silicon requires a purity of 99.9999% (6N) or higher. This is achieved through the Siemens Process, a chemical purification method. In this process, MG-Si is reacted with hydrogen chloride to form trichlorosilane (TCS) gas. The TCS is then distilled to remove impurities and subsequently passed over heated silicon rods in a deposition chamber. The pure silicon from the gas deposits onto the rods, growing large polycrystalline ingots over several days. This polysilicon is broken into chunks, which are the raw material for the next stage: ingot growth.

The polysilicon chunks must be converted into a solid, crystalline structure suitable for wafering. There are two primary methods: monocrystalline and multicrystalline (or polycrystalline) ingot growth. For monocrystalline silicon, the chunks are melted in a quartz crucible within a Czochralski (CZ) furnace held under an inert argon atmosphere at temperatures exceeding 1420°C. A small seed crystal of silicon is dipped into the melt and slowly pulled upward while rotating. The silicon atoms align with the seed’s crystal structure, forming a single, continuous crystal known as a boule. A typical boule can be 2 meters long and weigh several hundred kilograms. For multicrystalline silicon, the chunks are simply melted in a rectangular quartz crucible and then directionally solidified, where the melt is cooled from the bottom up. This results in a block containing multiple silicon crystals. Monocrystalline cells are more efficient but also more expensive to produce.

The solid ingot, whether monocrystalline or multicrystalline, is then processed into thin wafers. First, the ingots are squared off or rounded (for monocrystalline) using diamond-wire saws to remove the outer surface. The core ingot is then sliced into wafers using more diamond-wire saws. This is a critical step where material loss, known as kerf loss, is a major concern. Modern wires are as thin as 70-80 micrometers (µm), and the abrasive slurry or diamond particles embedded in the wire cut wafers that are now typically 160-180 µm thick—thinner than a human hair. The table below compares key parameters for the two main ingot types.

The sawn wafers are rough and damaged from the cutting process. A series of etching and cleaning steps, known as texturization and wafer cleaning, are essential to prepare the surface for optimal light absorption and semiconductor performance. The wafers are first washed in acidic and alkaline solutions to remove organic and metallic contaminants. For monocrystalline wafers, an anisotropic alkaline etch (e.g., sodium hydroxide) is used. This etch attacks the silicon crystal planes at different rates, creating a pyramid-like texture on the surface. These microscopic pyramids reduce light reflection by trapping photons, causing them to bounce around inside the cell rather than escaping. Multicrystalline wafers, with their random crystal orientation, require an isotropic acid etch (e.g., hydrofluoric and nitric acid) to create a more uniform textured surface. After texturing, the wafers undergo another thorough cleaning, often using a powerful RCA clean process, to leave an atomically clean surface.

The core of a photovoltaic cell is the PN junction, the semiconductor diode that separates electrical charges when exposed to light. This junction is formed through a process called doping. The textured and cleaned wafers, which are lightly doped with boron (P-type silicon), are loaded into a high-temperature diffusion furnace, typically operating at 800-900°C. A phosphorus-containing gas, such as phosphorus oxychloride (POCL3), is introduced. The heat causes phosphorus atoms to diffuse a fraction of a micron into the surface of the wafer, creating a thin layer of N-type silicon. The interface between the N-type layer and the P-type base is the PN junction. After diffusion, phosphorus glass that forms on the surface is removed in a hydrofluoric acid etch. A crucial side effect of this process is that the edges of the wafer also get doped, which would create a short circuit. This is remedied by an edge isolation step, where a laser or plasma etch is used to remove the N-type layer from the wafer’s perimeter.

While the PN junction creates the electric field, the cell needs a way to collect and conduct the generated electricity. This is the role of the contacts. First, an anti-reflective coating (ARC) is applied to the front surface to further minimize light loss. Silicon nitride (SiNx) is deposited using Plasma-Enhanced Chemical Vapor Deposition (PECVD). This coating gives the cells their characteristic dark blue or black color and also serves to passivate the silicon surface, reducing the recombination of electrons and holes. Next, the metallic contacts are printed onto the cell using a screen-printing process. A thick silver paste is printed in a fine grid pattern on the front side to allow light to pass through while collecting current. A full-area aluminum paste is printed on the back side, which also creates a Back Surface Field (BSF) that improves efficiency by repelling electrons to the front. The pastes contain glass frit that, during the subsequent co-firing step in a belt furnace at temperatures around 800°C, burns through the ARC and forms a strong ohmic contact with the silicon.

Every cell that comes off the production line must be rigorously tested to ensure it meets strict electrical specifications. This is done using flash testers, which simulate sunlight with a brief, high-intensity flash of light. The tester measures the cell’s key electrical parameters under Standard Test Conditions (STC: 1000 W/m² irradiance, 25°C cell temperature, AM 1.5 spectrum). The primary data collected includes:
Open-Circuit Voltage (Voc): The maximum voltage the cell can produce when no current is flowing.
Short-Circuit Current (Isc): The maximum current when the voltage is zero.
Maximum Power Point (Pmax): The point on the current-voltage curve where the product of current and voltage is highest.
Efficiency (η): The percentage of light energy converted to electrical energy (Pmax / Input Light Power).

Based on these measurements, cells are sorted into efficiency bins to be matched with similar-performing cells for module assembly. This binning process is critical for maximizing the power output of the final solar panel. Advanced factories also use Electroluminescence (EL) imaging, where the cell is forward-biased to emit infrared light. Defects like micro-cracks, broken fingers, or poor contact formation appear as dark spots on the EL image, allowing for the rejection of faulty cells before they are assembled into more valuable modules. This final quality gate ensures that only robust and high-performing cells are shipped to panel manufacturers.