How are photovoltaic cells manufactured in a factory?

At its core, manufacturing a photovoltaic cell is a highly precise, multi-stage industrial process that transforms raw polysilicon into the functional semiconductor devices that make up solar panels. The journey involves over a dozen intricate steps, each requiring stringent control over temperature, chemical purity, and physical conditions to ensure the final product efficiently converts sunlight into electricity. A typical factory, often referred to as a fab, is a symphony of automation, chemistry, and physics operating on a massive scale, capable of producing thousands of cells per hour.

From Sand to Silicon: The Raw Material Foundation

The entire process begins not in the factory, but with the primary raw material: silica sand. This sand is predominantly silicon dioxide (SiO₂). The first major step is to purify this silicon to a level unheard of in most other industries. The sand is heated in a high-temperature arc furnace with carbon sources like coal or wood chips. This carbothermic reduction process removes the oxygen, resulting in metallurgical-grade silicon (MG-Si) which is about 98-99% pure. While this is pure enough for many applications like aluminum alloys, it’s grossly insufficient for solar cells, where even minute impurities can drastically reduce efficiency.

MG-Si is then converted into a form suitable for high-purity purification. The most common method is the Siemens Process. In this method, the MG-Si is reacted with hydrogen chloride (HCl) to form trichlorosilane (SiHCl₃), a liquid at room temperature. Trichlorosilane is then distilled repeatedly. Because different compounds have different boiling points, this fractional distillation separates the silicon-bearing compound from impurities like boron and phosphorus. The purified trichlorosilane vapor is then introduced into a deposition reactor. Inside, thin rods of ultra-pure silicon, called “slim rods,” are heated to around 1100°C. The trichlorosilane decomposes in the presence of hydrogen, depositing high-purity silicon onto the rods and releasing hydrogen chloride, which is recycled. This process builds up a large polycrystalline structure over several days, resulting in electronic-grade polysilicon with a purity of 99.9999% (“six nines”) or higher. This polysilicon is the fundamental building block for over 95% of today’s solar cells.

Ingot and Wafer Production: Shaping the Silicon

The chunks of polysilicon are now ready to be formed into the thin wafers that will become individual cells. There are two primary methods for this, leading to the two main types of silicon cells: monocrystalline and polycrystalline.

Monocrystalline Silicon (Mono-Si): To create a single, continuous crystal lattice, polysilicon is melted in a quartz crucible inside a Czochralski (CZ) furnace under an inert argon atmosphere. A small seed crystal, perfectly aligned with the desired crystal structure, is dipped into the molten silicon and then slowly pulled upward while rotating. The silicon atoms from the melt align themselves with the seed’s structure, forming a cylindrical ingot known as a “boule.” A typical boule can be over 2 meters long and weigh several hundred kilograms. This single-crystal structure offers the highest efficiency for silicon solar cells, typically in the 22-24% range for premium products. The boule is then mechanically ground to a uniform diameter.

Polycrystalline Silicon (Multi-Si): In a simpler and less energy-intensive process, the polysilicon chunks are melted in a rectangular quartz crucible and then allowed to cool directionally in a controlled manner. As it solidifies, multiple crystals form, creating a blocky, metallic-flake appearance. While less efficient than mono-Si (typically 19-21% for standard cells) due to grain boundaries that can impede electron flow, the process is cheaper. The resulting rectangular ingot is more material-efficient when cutting into square wafers.

Regardless of the type, the ingot is next sliced into wafers using a multi-wire saw. The ingot is mounted on a cutting bed, and a single wire hundreds of kilometers long, wound in a complex web, is fed through a slurry of silicon carbide (an abrasive) and glycol-based coolant. The wire moves at high speed, grinding its way through the silicon. This process is incredibly material-intensive; about 40-50% of the high-purity silicon is lost as “kerf loss” turned into dust. The resulting wafers are incredibly thin, typically only 160-180 micrometers (µm) thick—thinner than a human hair. After slicing, the wafers are washed to remove any residual slurry.

Comparison of Ingot Methods

The Heart of the Matter: The Cell Fabrication Line

This is where the wafer is transformed from a passive slice of silicon into an active electronic device. The steps are sequential and must be performed in a cleanroom environment to prevent contamination.

1. Texturing: A perfectly smooth silicon surface is highly reflective, losing over 30% of incoming sunlight. To trap light, the wafer undergoes texturing. For monocrystalline cells, this is typically an anisotropic alkaline etch (using solutions like potassium hydroxide or sodium hydroxide). The etch attacks different crystal planes at different rates, creating a random pyramid structure across the surface. These pyramids cause light to bounce around internally, increasing the path length and the chance of absorption. For polycrystalline cells with random crystal orientations, an isotropic acid etch (using a mix of nitric and hydrofluoric acid) is used to create a pitted, crater-like texture. This step can reduce reflectivity to below 10%.

2. Doping: Creating the PN Junction: A solar cell is essentially a large-area semiconductor diode. Its core is the PN junction, created by doping different parts of the wafer with specific impurities. The starting wafer is usually lightly doped with boron (P-type, positive charge carrier). To form the junction, the wafer undergoes phosphorus diffusion. It is loaded into a high-temperature (800-900°C) quartz tube furnace. A phosphorus-containing gas, such as phosphorus oxychloride (POCL₃), is introduced. At high temperature, phosphorus atoms diffuse into the silicon surface, creating a thin N-type (negative charge carrier) layer. This process creates the essential electric field at the junction. After diffusion, “phosphosilicate glass” that forms on the surface is etched away using hydrofluoric acid.

3. Anti-Reflective Coating (ARC) and Passivation: Even after texturing, some light is still reflected. To further minimize losses, a thin layer of an anti-reflective coating is deposited on the cell’s front surface. The most common method is Plasma-Enhanced Chemical Vapor Deposition (PECVD). In a vacuum chamber, a gas like silane (SiH₄) and ammonia (NH₃) are introduced. A plasma is ignited, causing a chemical reaction that deposits a layer of silicon nitride (SiN_x) onto the wafer. This coating, typically 70-80 nanometers thick, acts as an optical interference layer, cancelling out reflections for a specific wavelength of light (usually green, where the sun’s spectrum is strongest). This gives the cells their characteristic dark blue or black color. Crucially, the silicon nitride layer also provides excellent surface passivation, meaning it reduces the recombination of electrons and holes at the surface before they can be collected, which is a major boost to efficiency.

4. Contact Printing: Screen and Metallization: To collect the generated electricity, metal contacts must be applied to the front and rear of the cell. This is done using a process similar to screen printing. A fine metal mesh screen with a pattern is placed over the wafer. A thick, paste-like ink is forced through the screen’s openings onto the wafer. The paste contains several key components:

• Metal Powders: Typically silver for the front-side fine lines (due to its high conductivity and low contact resistance with silicon) and aluminum for the rear side and busbars.
• Glass Frit: A glass powder that, upon heating, helps the paste etch through the ARC and form a strong ohmic contact with the silicon.
• Organic Binders: Vehicles that give the paste the right viscosity for printing.

The front side pattern is a grid of very fine “fingers” (around 50-80 µm wide) to collect current, connected by wider “busbars” (1-2 mm wide) to consolidate it. The rear side is typically a full-layer aluminum print, which also serves a second critical function: during the subsequent firing step, the aluminum alloys with the silicon, creating a Back Surface Field (BSF) that improves performance. Newer technologies like PERC (Passivated Emitter and Rear Cell) modify the rear contact to be localized, further boosting efficiency.

5. Firing: The Co-firing Process: The printed wafers now have wet paste on them. They are conveyed through a multi-zone rapid thermal processing furnace, or “firing furnace.” This is a critical step. The belt moves the wafers through a series of precisely controlled temperature zones, reaching a peak temperature of around 700-800°C for only a few seconds. During this brief thermal cycle, the organic binders burn off, the glass frit melts and etches through the silicon nitride layer, and the metal particles sinter together and form a strong electrical contact with the silicon bulk. The peak temperature and belt speed must be exquisitely controlled; a few degrees or seconds can mean the difference between a perfect contact and a ruined cell.

Final Testing, Sorting, and Moving to Panel Assembly

After firing, the cells are complete. Each one is individually tested under a simulated sun (a solar simulator or “flash tester”) that measures its current-voltage (I-V) characteristics. Key parameters recorded include:

• Open-Circuit Voltage (Voc): The voltage with zero current.
• Short-Circuit Current (Isc): The current with zero voltage.
• Maximum Power Point (Pmax): The point of maximum power output.
• Fill Factor (FF): A measure of the “squareness” of the I-V curve.
• Efficiency (η): Pmax divided by the incident light power.

Based on these measurements, the cells are automatically sorted into efficiency “bins” (e.g., 21.0-21.5%, 21.5-22.0%). This binning is crucial for panel assembly, as cells with closely matched electrical characteristics are grouped together to ensure the final panel performs optimally. Cells that do not meet minimum specifications are rejected. The finished cells are then packaged and sent to a separate production line, or a different facility, where they are interconnected, laminated with glass and backsheet, framed, and junction-boxed to become a complete solar module.